RISC-V native execution
Given today’s de facto convergence towards RISC-V zkVMs there may be an opportunity to expose RISC-V state transitions natively to the EVM (similarly to WASM in the context of Arbitrum Stylus ) and remain SNARK-friendly.
I would be quite wary of that, RISC-V (and WASM and MIPS) are bad ISA for bigint operations and elliptic curve cryptography. As an example emulating add-with-carry in those ISAs requires 5x more operations compared to x86 or ARM:
result_tmp = a + b
carry_tmp1 = result1 < a
result_out = result1 + carry_in
carry_tmp2 = result_out < result1
carry_out = carry_tmp1 OR carry_tmp2
return (carry_out, result_out)
Due to this inherent inefficiency, all Risc-V zkVMs are implementing a “dialect” (to reuse an MLIR compiler term) of RISC-V modified with native uint256 and elliptic curves ISA extensions.
As there are different approaches to this with different tradeoffs, we should leave the complexity to the zkVMs, it’s fine to have a RISC-V + EVM dialect (or MIPS+EVM for zkMIPS or Valida+EVM for Valida, WASM+EVM for zkWASM)